Driven by the need for increased speed, portability and wiring density, the interconnect pitch on semiconductor packages, and the corresponding high density interconnect (HDI) substrates, continue to shrink. The combination of filled blind microvias and build-up technology provides a means to achieve the required wiring densities. With the rapid growth of this technology, the use of electrodeposited copper for filling blind microvias has become a widely adopted process for manufacture of both HDI printed circuit boards (PCBs) and also semiconductor package substrates.
To produce increasingly fine pitch designs, build-up technology has shifted from subtractive techniques, which are limited by etch process tolerances, toward semi-additive processing (SAP). As both microvia dimensions and trace widths become smaller, the ability of copper filling processes to consistently produce void-free copper filled microvias and traces with acceptable cross sectional profiles comes under increasing pressure.
This article describes a number of key factors affecting copper electroplating for microvia filling and the levels of performance that are currently available to meet the needs of this important market.
Bath Chemistry Parameters Affecting Via Fill
The vast majority of via fill electroplating baths are based on electrolytes consisting of copper sulfate and sulfuric acid. Combining low cost and convenient operation, these sulfate based systems are a well established technology, having now been used in the PCB industry for over 50 years and for via fill applications for over 10 years.
A typical acid sulfate system contains copper sulfate (the primary source of cupric ions), sulfuric acid (for solution conductivity) and chloride ion (as a co-suppressor). Of these components, copper sulfate, typically at concentrations above 200 g/L, has the most significant affect on via filling ability.
Acid copper sulfate system operated without additives typically yield deposits of poor physical properties. Organic additives, typically consisting of materials described as brighteners, suppressors and levelers, are therefore used to further refine deposit characteristics.
Carriers are typically large molecular weight polymers that work in conjunction with small amounts of chloride to form a surface film on the plating surface, which retards the plating reaction. This limits the lifetime of individual growing grains, causing the deposit grain size to become smaller than that obtained without carrier. Carriers are present in relatively high concentration (500 to 3,000 g/L) and show relatively low sensitivity to variations in the rate of mass transfer to the surface. However, in the absence of additional additives, deposits from such formulations do not have smooth, bright surfaces.
Brighteners are typically small, molecular weight sulfur-containing compounds that locally increase the plating reaction by displacing adsorbed carrier. The impacts of brightener additions occur preferentially at points of lower field density, typically in surface recesses or at the bottoms of vias or trenches. The function of the brightener is to locally accelerate the rate of the copper plating reaction and further refine the grain size of the deposit.
Levelers, a further class of additives, act as selective suppressors and typically operate at low concentration (< 10 ppm). At these low concentrations, the activity of levelers is much more mass transfer dependent then that of carriers, with the consequence that less isolated locations (such as the panel surface) are more suppressed than more isolated locations, such as the interior surfaces of vias and recesses within via hole walls.
Bottom-Up Fill Mechanism
For blind vias to be filled with a high quality continuous copper deposit, the plating rate within an individual via must vary. The plating rate at the base of the via must be substantially faster than that that of the remaining areas to avoid premature closure of the mouth of the via opening and the consequent formation of voids or seams.
Accelerated bottom-up filling has been attributed to the mode of action of the organic additive system (1). The suppressor or carrier forms a current inhibiting film on the Cu surface. This film forms uniformly at all locations, assisted by the high solution concentration of suppressor. The accelerated bottom-up filling (i.e. “superfilling”) is believed to be driven by brightener concentration enhancement at the base of the feature (via or trench) during the plating process. Progressive reductions in surface area of via bottoms during deposition “squeeze” the brightener into ever decreasing areas. This localized concentration of brightener further accelerates the plating rate relative to the surface. The leveler acts to suppress the plating at the corners of vias, and aid in reducing the formation of a void. To maintain bottom-up filling behavior, brightener concentration must be controlled within specified limits.
Process Parameters Affecting Via Fill
In addition to process chemistry formulation and bath composition, the key process factors affecting via filling are substrate condition, solution flow, current density and the pretreatment process.
Via profile, thickness and uniformity of the initial conductive layer, degree of surface oxidation and type of dielectric material have a significant impact on via filling ability. A ‘V’-shaped via, with uniform sidewalls free of overhang or protruding glass fibers, promotes consistent seed layer formation and enhances subsequent via fill. Accordingly, non-reinforced dielectric materials are generally easier to fill. A thin or discontinuous seed layer will significantly degrade via fill performance.
While lower levels of solution flow will generally improve via filling performance, particularly of large (100 µm or above) vias, this improvement comes at the price of increased risk of improperly filled small (75 µm or less) diameter vias. Improper fill may manifest itself as defects ranging from seams within the plated deposit, to completely voided vias. The consequence of this behavior is that equipment parameters must be optimized to achieve acceptable levels of fill and plating quality for the specific applications being run.
The effects of current density are somewhat less confounded, as lower current density will both enhance via filling performance and also produce product with lower levels of improperly filled vias. However, the impact of current density is strongest at the very early stages of via filling. Once vias have partially filled, higher current densities can be applied without adverse effects.